XC5VFX100T-2FF1738C | Xilinx

Field Programmable Gate Array, XC5VFX100T-2FF1738C, Xilinx

The Virtex-5 FPGA contains five distinct platforms (sub-families), offering the most choice of any FPGA. Each platform contains a different ratio of features to address the needs of a wide variety of advanced logic designs. In addition to its advanced, high-performance logic fabric, the Virtex-5 FPGA contains many hard-IP system-level blocks, including a powerful 36-Kbit block RAM/FIFO, a second-generation 25 x 18 DSP slice, SelectIO technology with built-in digitally controlled impedance, a ChipSync source-synchronous interface block, system monitor functionality, an enhanced clock management tile with an integrated DCM (Digital Clock Manager) and phase-locked-loop (PLL) clock generator, and advanced configuration options. Additional platform-dependent features include a power-optimized high-speed serial transceiver block for enhanced serial connectivity, a PCI Express-compliant integrated Endpoint block, a tri-mode Ethernet MAC (Media Access Controller), and a high-performance PowerPC 440 microprocessor embedded block.

These features allow the advanced logic designer to build the highest levels of performance and functionality into an FPGA-based system. Built on a 65-nm state-of-the-art copper process technology, the Virtex-5 FPGA is a programmable alternative to custom ASIC technology. Most advanced system designs require the programmable strength of an FPGA. The Virtex-5 FPGA offers the best solution for addressing the needs of a high-performance logic designer, high-performance DSP designer, and high-performance embedded systems designer with unprecedented logic, DSP, hard/soft microprocessor, and connectivity capabilities. The Virtex-5 LXT, SXT, TXT, and FXT platform includes advanced high-speed serial connectivity and link/transaction layer capability.

Features

• Cross-platform compatibility
• Powerful clock management tile (CMT) clocking
• High-performance parallel SelectIO technology
• Integrated Endpoint blocks for PCI Express Designs