SN74LS92N | Texas Instruments

Divide-By-Twelve Counter, SN74LS92N, Texas Instruments

This monolithic counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-six for the SN74LS92N. This counter has a gated zero reset and also has a gated set-to-nine input for use in BCD nine's complement applications. To use its maximum count length (decade) the CKB input is connected to the QA output. The input count pulses are applied to the CKA input, and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the '90A counter by connecting the QD output to the CKA input and applying the input count to the CKB input, which gives a divide-by-ten square wave at output QA.