SN74LS377N | Texas Instruments

Octal D-Type Flip-Flop, SN74LS377N, Texas Instruments

This monolithic, positive-edge-triggered flip-flop utilizes TTL circuitry to implement D-type flip-flop logic with an enable input. The SN74LS377N features a common enable instead of a common clear. Information at the D input meeting the setup time requirement is transferred to the Q output on the positive-going edge of the clock pulse if the enable input G\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuit is designed to prevent false clocking by transitions at the G\ input. This flip-flop is guaranteed to respond to clock frequencies ranging from 0 to 30 MHz, while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 10 milliwatts per flip-flop.

Features

• Contain Eight Flip-Flops, Respectively, with Single-Rail Outputs
• Individual Data Input to Each Flip-Flop

Applications

• Buffer/Storage Registers
• Shift Registers
• Pattern Generators