SN74LS138N | Texas Instruments

Decoder, SN74LS138N, Texas Instruments

This Schottky-clamped TTL MSI circuit is designed for use in high-performance memory decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When employed with a high-speed memory utilizing a fast enable circuit, the delay time of this decoder and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the Schottky-clamped system decoder is negligible.

The SN74LS138N decodes one of eight lines depending on the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable input reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

Features

• Designed Specifically for High-Speed
• Memory Decoders
• Data Transmission Systems
• Schottky-Clamped for High Performance