SN74HC165DR | Texas Instruments

Parallel-Load Shift Register, SN74HC165DR, Texas Instruments

The SN74HC165DR device is an 8-bit parallel-load shift register that shifts data toward a serial output (QH) when clocked. Parallel input access to each stage is provided through eight direct data inputs (A-H), which are enabled when the shift/load (SH/LD) input is held low. The device also includes a clock-inhibit (CLK INH) function and a complementary serial output. Clocking occurs on the low-to-high transition of the clock (CLK) input when SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK combined with a low-to-high transition of CLK INH can also produce a clock event, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is high. When SH/LD is low, the parallel inputs are enabled regardless of the levels of CLK, CLK INH, or the serial (SER) input.

Features

• Low Input Current of 1-μA Maximum
• Complementary Outputs
• Direct Overriding Load (Data) Inputs
• Gated Clock Inputs
• Parallel-to-Serial Data Conversion

Applications

• Programable Logic Controllers
• Appliances
• Video Display Systems
• Output Expander
• Keyboards