SN74HC112N | Texas Instruments
Dual negative edge-triggered J-K flip-flops, with clear and preset, PDIP-16, Texas Instruments SN74HC112N
Triggered Flip-Flop, SN74HC112N, Texas Instruments
The SN74HC112N device contains two independent J-K negative-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the fall time of the CLK pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. This versatile flip-flop can perform as a toggle flip-flop by tying J and K high.
Applications
- Servers
- LED displays
- Network switch
- Telecom infrastructure
- Motor drivers
- I/O expanders
| Filter | Property | Value |
|---|---|---|
| Product type | dual negative edge-triggered J-K flip-flops | |
| Version | with clear and preset | |
| Enclosure | PDIP-16 | |
| Assembly | THT | |
| Output current | 5.2 mA | |
| min. operating temperature | -40 °C | |
| max. operating temperature | 85 °C |
| Property | Value |
|---|---|
| Original Packaging | Bar with 25 pieces |
| MSL | MSL 1 |
| Customs tariff number | 85423390 |
| Country of origin | US |
| Property | Value |
|---|---|
| Date of RoHS guidelines | 3/31/15 |
| SVHC free | Yes |
| RoHS conform | Yes |