CMOS Dual Up-Counter, CD4518BE, TI
The CD4518BE Dual BCD Up-Counter consists of one identical, internally synchronous 4-stage counter. The counter stage is a D-type flip-flop having interchangeable CLOCK and ENABLE lines for incrementing on either the positive-going or negative-going transition. For single-unit operation, the ENABLE input is maintained high and the counter advances on each positive-going transition of the CLOCK. The counter is cleared by a high level on its RESET line.
The counter can be cascaded in ripple mode by connecting Q4 to the ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. The CD4518BE is supplied in a 16-lead hermetic dual-in-line ceramic package (F3A suffix), a 16-lead dual-in-line plastic package (E suffix), a 16-lead small-outline package (M, M96, or NSR suffix), and a 16-lead thin shrink small-outline package (PW or PWR suffix).
