IS49RL36160A-107EBLI | Integrated Silicon Solution INC

SDRAM, IS49RL36160A-107EBLI, Integrated Silicon Solution INC

The IS49RL36160A-107EBLI is a high-speed memory device designed for high-bandwidth data storage-telecommunications, networking, cache applications, and so forth. The chip’s 16-bank architecture is optimized for sustainable high-speed operation. The DDR I/O interface transfers two data bits per clock cycle at the I/O balls. Output data is referenced to the READ strobes. Commands, addresses, and control signals are also registered at every positive edge of the differential input clock, while input data is registered at both positive and negative edges of the input data strobes.

Features

• Programmable READ/WRITE latency (RL/WL) and burst length
• Data mask for WRITE commands
• Differential input clocks
• Free-running differential input data clocks
• Integrated on-die termination (ODT)
• Multiplexed and non-multiplexed addressing capabilities
• Mirror function