EPF10K10TC144-4N | INTEL

FPGA, EPF10K10TC144-4N, Intel

The EPF10K10TC144-4N is a device with first embedded PLD it is based on reconfigurable CMOS SRAM elements, the flexible logic element matrix (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions.

Features

• Up to 40,960 RAM bits, 2,048 bits per embedded array block
• In-circuit reconfigurability (ICR) via external configuration device, intelligent controller
• Peripheral register for fast setup and clock-to-output delay
• Open-drain option on each I/O pin
• Built-in low-skew clock distribution trees

Applications

• Digital filters